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Showing posts from September, 2025

Designing AI Chips: Key Considerations for Building Intelligent Hardware

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  I’ve been writing a lot about AI lately, but for some good reasons. AI seems to be dominating a lot of public discussion, both inside and outside the tech world, so it’s natural to address it. Many electronic design automation (EDA) vendors, including Agnisys, are including AI in our solutions. We’re also seeing more and more customers designing innovative chips to provide hardware support for AI algorithms. Let’s talk about the implications of this for your development teams. Power Is Key Companies are designing their own dedicated chips to increase the speed at which AI applications can tackle the problems thrown at them, as well as their capacity for ever larger problems. It is entirely possibly to run AI algorithms on any standard processor, and for relatively simple applications this may suffice. However, for the harder problems software alone can’t provide answers in real time, so moving some algorithms into hardware is required. If that sounds familiar, it should. Early c...

Creating and Accessing the Single Source of Truth with Agnisys Collaboration Framework

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  Recently, I wrote the blog post “ Design, Verification, and Software Development Decisions Require a Single Source of Truth ” and published it on our site. I pointed out how this 60-year-old term is highly relevant for our specification automation solutions for IP and system-on-chip (SoC) development. In today’s post, I’m exploring some of the issues that arise when you use a single source of truth (SSOT) on your project and show how you can make it easier with Agnisys Collaboration Framework. An SSOT Refresher In case it’s been a while since you read my previous post, let me remind you that SSOT is based on an information architecture in which all data is edited in a single master location. There may be local copies for better performance, but all writes propagate to the master. In our world, SSOT refers to the master source for your IP or chip specifications. All the design, verification, software, validation, and documentation files that we automatically generate use this sing...